Chang Sheng

+
Click:  
The Last Update Time:  --

Paper Publications

Current position: Home >> Scientific Research >> Paper Publications

PEDSA: High-Throughput Pipeline-Based FPGA Accelerator for Convolutional Encoder-Decoder Segmentation Networks

Date:2018-01-13 Hits:

Journal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Indexed by: Journal paper

Page Number: Vol.44, No.4, pp.1326-1339

Translation or Not: no

Date of Publication: 2025-04-01

Pre One:A Spatial-based Quantum Graph Convolutional Neural Network and Its Full-quantum Circuit Implementation Next One:A High-Performance Pixel-Level Fully Pipelined Hardware Accelerator for Neural Networks

Copyright @ 2017 Wuhan University